Using a serial cache for energy efficient instruction fetching

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Using a serial cache for energy efficient instruction fetching

Computer Science Department, University of California, Los Angeles Department of Computer Science and Engineering, University of California, San Diego Abstract The design of a high performance fetch architecture can be challenging due to poor interconnect scaling and energy concerns. Way prediction has been presented as one means of scaling the fetch engine to shorter cycle times, while providi...

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ژورنال

عنوان ژورنال: Journal of Systems Architecture

سال: 2004

ISSN: 1383-7621

DOI: 10.1016/j.sysarc.2004.02.004